Guest Lecture with Dr. Alberto Marchisio

How do we run today's most capable AI models on devices that must fit inside a wearable, a robot or a battery-powered sensor? On August 19, Dr. Alberto Marchisio visits SDU to show how machine learning algorithms, hardware-aware optimisation and specialised accelerators can be designed together – and how AI is starting to help design the hardware it runs on.

Modern AI is rapidly transforming intelligent systems, from collaborative robots and wearable healthcare devices to autonomous systems and edge applications. Yet deploying these increasingly capable models under strict limits on energy consumption, latency, memory and reliability remains a major challenge, particularly where computing resources and battery capacity are scarce.

In his talk, Cross-Layer Design of Intelligent and Efficient Computing Systems: Enabling Edge Intelligence through AI Accelerators and AI-Assisted Hardware Design, Dr. Marchisio argues that such constraints cannot be solved at a single level of the stack. He presents cross-layer methodologies that span machine learning algorithms, hardware-aware optimisation, specialised AI accelerator architectures and emerging computing paradigms.

From Transformer accelerators to agentic design workflows

The lecture covers hardware accelerators for advanced neural networks and Transformers, hardware-software co-design for efficient edge intelligence, and neuromorphic computing for embodied AI. It then turns the relationship around and looks at AI-assisted hardware design, where large language models and agentic workflows take part in the design process itself.

Dr. Marchisio closes with his research vision for SDU: AI-native hardware systems that enable efficient, trustworthy and scalable edge intelligence for the next generation of robotics, wearable healthcare and intelligent IoT systems.

About the speaker

Dr. Alberto Marchisio is Research Team Lead and Postdoctoral Associate at the eBRAIN Lab, New York University Abu Dhabi, UAE. He received his B.Sc. and M.Sc. degrees in electronic engineering from Politecnico di Torino, Italy, in 2015 and 2018, and his PhD in computer engineering from TU Wien, Austria, in 2023. His research sits at the intersection of machine learning, computer architecture and hardware design, with an emphasis on AI accelerators, hardware-software co-design, neuromorphic computing, quantum machine learning and AI-assisted design.

He has authored more than 70 peer-reviewed publications in leading journals and conferences, including DAC, DATE, ICCAD, TVLSI, TCAD and IJCNN, and was runner-up for the INNS Best Dissertation Award in 2024. He serves as a TPC member of major EDA and systems conferences such as DAC, DATE, ICCD, CASES and DSD, is Associate Editor of the ACM/SIGDA e-Newsletter, and has organised special sessions and workshops at IROS, IJCNN and IOLTS.

The lecture is organised by SDU Microelectronics and is open to all interested parties. No registration is required.